Technical explainers and analysis from an experimental physicist on quantum computing hardware, error correction and industry structure. Readers get context on recent papers and engineering trade-offs, backed by concrete numbers.

A newsletter for FPGA and RTL design interview preparation, with each issue pairing a concept explainer with an interview question and a design challenge. It focuses on the reasoning behind design decisions, such as false paths, timing reports and control sets, and ties into the author's book.

Vendor-neutral audits of electronic component obsolescence, covering end-of-life status, replacement cross-references and whether a given board can still be built. Each issue documents the evidence used, the confidence level and what remains unverified.